FIG. 1 presents a part of known gate driving circuit 100 which is protected against high voltages which may be received from the gate which is driven by circuit 100 in circumstances of DC over stress, such as a short to a voltage source, a load dump, and in circumstances of Electrostatic Sensitivity Device (ESD) ElectroMagnetic Compatibility (EMC) system level stress.
In dependence of the gate control input signal, the output terminal GateDriver_Output is connected to the supply voltage Vsup via an n-type back-to-back MOS switch, or connected to the ground via another circuit (NMV3). The n-type back-to-back MOS switch is formed by n-type MOSFETS NMV1, NMV2 that have common gates and common sources. Because of the use of n-type MOSFETS, the gates of the MOSFETS NMV1, NMV2 must be driven by a voltage that is higher than the supply voltage Vsup. Therefore, an amplifying circuit A1 is coupled in the input signal path which amplifies the signal to higher voltage levels. The amplifier receives a higher supply voltage from a charge pump circuitry CP. The charge pump circuitry CP is, when manufactured on a semiconductor material, a relatively large circuitry, and, thus, a relatively expensive solution.
As the result of stress in a circuit, which is driven by the signal of the output terminal GateDriver_Output, high voltages may be received at the output terminal GateDriver_Output. Such high voltage may damage and destruct the MOSFETs NMV1, NMV2 during fast transient like ESD or gun stress. Zener diodes Z2, Z3 are inserted in the circuit to protect the MOSFETs NMV1, NMV2 against too high voltage differences between the common sources and the common gates. Resistor R0 acts as a passive pulldown of MOSFETs NMV1, NMV2. Zener diodes Z0 and Z1 are inserted to avoid the gate-source voltage of NMV1 and NMV2 are not clamped by Z2 and Z3 (about 1.2V) to ensure the normal function. Such a configuration with zener diodes and a resistor results in an undesired current injection during the high voltage event on the output terminal GateDriver_Output.
The Over Voltage Detection circuitry OVD detects whether the voltage at the GateDriver_output terminal is too high and uses an inverter and two logic AND circuits to provide a low signal to the amplifiers A1, A2 which control the n-type back-to-back MOS switch and the nMOSFET NMV3. If the signal received by the amplifiers A1, A2 is low, their output will be connected to ground and excessive high voltages, which may be received at the output of the amplifiers A1, A2, are coupled to the ground voltage Vgnd.